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A Wideband Receiver Employing PWM-Based Harmonic Rejection Downconversion | IEEE Journals & Magazine | IEEE Xplore

A Wideband Receiver Employing PWM-Based Harmonic Rejection Downconversion


Abstract:

A harmonic rejection (HR) receiver that utilizes discrete-level pulsewidth modulation (PWM) to implement a sinusoidal local oscillator (LO) with intrinsic HR is demonstra...Show More

Abstract:

A harmonic rejection (HR) receiver that utilizes discrete-level pulsewidth modulation (PWM) to implement a sinusoidal local oscillator (LO) with intrinsic HR is demonstrated. The PWM-LO is employed in a switching mixer. The receiver can be configured to provide additional HR, by employing multiphase paths, with appropriate baseband gain coefficients. The PWM generator employs parallel delay-locked loops to implement a three-level natural-sampling dual-edge PWM sinusoidal LO signal, with rejection of the third, fifth, and seventh LO harmonics. Gain control using LO-path pulsewidth control is demonstrated. The design is implemented in a 40-nm CMOS process. The receiver gain with HR is 26.4-30.1 dB in multi-phase LO configuration and 28-31.8 dB in single-phase configuration. The double-sideband noise figure at peak gain is 5.8 dB. The design demonstrates worst case HR3 and HR5 ratios of 47 and 49 dB without calibration for fLO = 100 MHz in the multi-phase configuration, with a total power dissipation of 41.1 mW. With calibration, a single-phase peak harmonic rejection ratio (HRR) higher than 73 dB for the third, fifth, and seventh LO harmonics is demonstrated. Gain dependence of the HRR is studied.
Published in: IEEE Journal of Solid-State Circuits ( Volume: 53, Issue: 5, May 2018)
Page(s): 1398 - 1410
Date of Publication: 10 January 2018

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