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A Reconfigurable Architecture Using a Flexible LO Modulator to Unify High-Sensitivity Signal Reception and Compressed-Sampling Wideband Signal Detection | IEEE Journals & Magazine | IEEE Xplore

A Reconfigurable Architecture Using a Flexible LO Modulator to Unify High-Sensitivity Signal Reception and Compressed-Sampling Wideband Signal Detection


Abstract:

The direct RF-to-information converter unifies high-sensitivity signal reception and compressed-sampling (CS) wideband signal detection into a rapidly reconfigurable and ...Show More

Abstract:

The direct RF-to-information converter unifies high-sensitivity signal reception and compressed-sampling (CS) wideband signal detection into a rapidly reconfigurable and easily scalable architecture occupying 0.56 mm2 in 65-nm CMOS. In reception mode, the DRF2IC RF frontend consumes 46.5 mW from 1.15 V and delivers 40-MHz RF bandwidth, 41.5-dB conversion gain, 3.6-dB noise figure, and -2 dBm B1dB. In CS wideband detection mode, 66-dB operational dynamic range, 40-dB instantaneous dynamic range, and 1.43-GHz instantaneous bandwidth are demonstrated, and six interferers each 10 MHz wide scattered over a 1.27-GHz span are detected in 1.2 μs consuming 58.5 mW.
Published in: IEEE Journal of Solid-State Circuits ( Volume: 53, Issue: 6, June 2018)
Page(s): 1577 - 1591
Date of Publication: 07 March 2018

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