Abstract:
A 1.33-Tb 4-bit/cell quadruple-level (QLC) 3-D flash memory in a 96-word-line (WL)-layer technology that achieves 8.5 Gb/mm2 has been developed. This is the biggest capac...Show MoreMetadata
Abstract:
A 1.33-Tb 4-bit/cell quadruple-level (QLC) 3-D flash memory in a 96-word-line (WL)-layer technology that achieves 8.5 Gb/mm2 has been developed. This is the biggest capacity and the highest bit density ever reported. A source-bias-negative-sense with CLK-control allows deep negative Vth sensing while maintaining low supply voltage. A new two-step (8-16) programming method and VDD generator enhancement realized a narrow Vth for QLC with 18% tProg improvement. Page/state-dependent word-line (WL) overdrive shortens the WL transient time by 8%. An independent plane read enables reading from different WL address from each plane in multi-plane operation. Besides, mixing selection of QLC pages (lower/middle/upper/top) in one plane and triple-level cell (TLC) pages (lower/middle/upper) or single-level cell (SLC) page in the other is also supported to provide flexibility for system implementation.
Published in: IEEE Journal of Solid-State Circuits ( Volume: 55, Issue: 1, January 2020)