Abstract:
We present a broadband parallel-combined compact Doherty power amplifier (PA) in a 28-nm bulk complementary metal–oxide–semiconductor (CMOS) device technology for fifth-g...Show MoreMetadata
Abstract:
We present a broadband parallel-combined compact Doherty power amplifier (PA) in a 28-nm bulk complementary metal–oxide–semiconductor (CMOS) device technology for fifth-generation (5G) millimeter-wave (mm-Wave) frequency band (n257, n258, and n261) applications. The proposed Doherty PA has a single transformer (TF)-based output matching network and an equivalent quarter-wavelength line placed between the carrier and peaking amplifiers, absorbing transistors’ output parasitic capacitances. Therefore, the Doherty PA occupies a very small die area and has a wide bandwidth characteristic compared with the conventional Doherty PA output matching network topologies (e.g., parallel- and series-combined Doherty PA output matching networks). The two-stage differential Doherty PA is implemented, which shows a saturation output power ( P_{\mathrm {OUT}} ) of >18.8 dBm and a peak power-added efficiency (PAE) of >30% at 27 GHz. It also exhibits a linear P_{\mathrm {OUT}} of 12.4 dBm and an average PAE of 20.2% for 100 MHz 5G NR signal ( P_{\mathrm {OUT}} of 11.4 dBm and PAE of 18.1% for 8 \times 100 MHz carriers) at the EVM of −25 dB. Over the frequency range of 24.5–29.5 GHz, the PA achieves a linear P_{\mathrm {OUT}} of >11.2 dBm and a PAE of >14.5% (drain efficiency >20.8%). This PA occupies 640 \mu \text{m}\,\,\times 250 \mu \text{m} (core only) and is successfully integrated into a 32-channel RF phased-array transceiver IC for the first time. The IC die area is 10.2 mm \times 6.4 mm and consumes about 120 mW per channel at P_{\mathrm {OUT}} of 10.0 dBm.
Published in: IEEE Journal of Solid-State Circuits ( Volume: 57, Issue: 5, May 2022)