This article proposed a multiple-point multiple-channel wireless neural signal recording system-on-chip (SoC) integrated a frequency-division (FD) transceiver. In order to reduce the on-chip power consumption, a continuous phase modulation-based polar transmitter (TX) was proposed for the uplink data, enabling two modes with different data rates. A single-channel phase-tracking receiver (RX) was proposed for a low-power downlink to receive control commands. An FD multiple access-based coordinator receiving method was proposed, enabling multiple-point recording without increasing the power consumption of the on-body side. A configurable cascaded-integrator-comb sub-band filter bank-based time-multiplexing demodulation algorithm was proposed with 20 $\times$ and 5 $\times$ reduction of the number of multiply accumulates (MACs) and their operations compared with the direct filter method, respectively. Experimental results show a power consumption of 4.18 mW for the SoC with 16-channel neural signal recording and −5-dBm transmitter output power. The on-chip receiver consumes 3.81 mW in the waiting signal stage and 3.26 mW in the demodulation stage. A sensitivity of −91 dB was achieved for the on-chip phase-tracking receiver. In the bench test, a working distance longer than 8 m was measured for the whole system under the worst case scenario in the configuration of ten devices. In vivo tests were performed on multiple freely moving rats in an open field, validating the proposed system in social interaction research.