This article presents a triaxial microelectromechanical system (MEMS) capacitive accelerometer using a high-voltage biasing technique to achieve high resolution with ultralow power. The accelerometer system generates a differential pair of high voltages to bias the MEMS structure, raising the MEMS signal substantially above the noise floor of the analog front-end (AFE) circuits. With the consequent increased signal-to-noise ratio (SNR), the proposed accelerometer system eliminates the need for a power-hungry low-noise amplifier (LNA) and signal chopping which significantly improves the power-noise tradeoff found in conventionally biased MEMS accelerometers. Moreover, by fine-tuning the bias voltages, the proposed method cancels the electrostatic mismatch in the MEMS due to process variation and ensures robust operation. The proposed accelerometer is composed of one integrated MEMS-CMOS chip and one CMOS-only chip. In postfabrication testing, it achieves a 121- $\mu \text{g}/\surd$ Hz input-referred noise floor with ±1.5-g dynamic range, ${ < }1$ % linearity error, and 184-nW per-axis power (including high-voltage bias generation). Compared to prior art, the design achieves a 10.3 $\times$ FoM improvement in both power and noise specifications.