Combinatorial optimization problems (COPs) are essential in various applications, including data clustering, supply chain management, and communication networks. Many real-world COPs are non-deterministic polynomial-time hard problems intractable using classical computers. Ising machine, the hardware accelerator based on the Ising model and annealing operation, has gained much attention as an alternative for solving COPs. The COPs are mapped to the Ising model, and their optimal/near-optimal solutions are explored by the intrinsic convergence property of the Ising machine. However, prior Ising machines based on locally connected spins have limitations in solving hard COPs due to significant overhead while mapping the Ising model to the inflexible hardware topology. In this work, we propose a scalable CMOS Ising machine with a network of flexible processing elements (PEs) to map and solve complex COPs with minimal overhead. The proposed Ising machine implements 256 PEs, where each PE is reconfigured to 1-to-4 spins with 28 spin interactions based on 8-bit coefficients. A 65-nm prototype chip has been fabricated, and a range of COPs have been mapped and solved, including max-cut and Boolean satisfiability problems.