In this paper, a high-accuracy switched-capacitor (SC) capacitance-to-voltage (C/V) converter is presented. The proposed circuit can greatly reduce the influences of the channel charge injection and clock feedthrough from analog switches, and the finite gain of the op-amp using three kinds of voltages. Performances of the proposed circuit are simulated by HSPICE using 0.18 μm CMOS process parameters. Simulated results have demonstrated that the gain error is 0.00016% and the maximum nonlinear error is 0.00029% of the full scale. The conversion accuracy of 0.01% or better can be achieved even when low-gain amplifier such as single-stage differential amplifier is used. A prototype chip was fabricated in 0.18 μm CMOS process. The principles of operation of the prototype chip was confirmed by measurement results. The gain and maximum nonlinear errors are 2.34% and 0.41% of the full scale, respectively.