Proposal of a functional safety methodology applied to fault tolerance in FPGA applications | IEEE Conference Publication | IEEE Xplore

Proposal of a functional safety methodology applied to fault tolerance in FPGA applications


Abstract:

This paper proposes a functional safety methodology applied to fault tolerance in FPGA applications by evaluating a case study in digital signal processing (DSP) field. T...Show More

Abstract:

This paper proposes a functional safety methodology applied to fault tolerance in FPGA applications by evaluating a case study in digital signal processing (DSP) field. This study is based on the safety standard IEC 61508 that states a safe system must be capable of detecting faults and it should have a safety mode. So, functional evaluations of a configurable DSP module were needed to define this methodological proposal. Besides, identification of its critical paths and proper definition of safety architectures were done. The case study was developed in configurable hardware. Furthermore, due to the influences of external factors, such as temperature, electromagnetic fields, among others, together with the advance of technology that reduces the components' size, entails in a much bigger occurrence of faults in a circuit. Hence, preliminary results from the use of this methodology indicated a reduction of up to 95 % in Single Event Transients (SETs) occurrence as well as a hardware area increase from 60 % to 163 %.
Date of Conference: 06-08 April 2016
Date Added to IEEE Xplore: 02 June 2016
Electronic ISBN:978-1-5090-1331-9
Conference Location: Foz do Iguacu, Brazil

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