Several debugging methods are available for FPGA design, including logical simulation and physical debug. We face the challenge to systematize and apply a simple methodology using these methods to develop a communication processing module for a distributed control system with real time constraints. This methodology must follow some restrictions as to be easy to learn, use only available tools and not conflict with techniques employed by our industrial partner. The hardware module must be designed from scratch and must replace commercial communication modules in new devices. It will be responsible for real time interactions between programmable controllers and remote IO in large distributed control systems. The paper describes our experience designing the processing module, the methodology applied and an evaluation of this methodology during the project development.