This letter designs the performance enhancement guaranteed cache (PEG-C) for hard real-time systems. The PEG-C uses two counters to monitor the number of hits and misses at runtime to improve the average-case performance, while guaranteeing the worst-case execution time (WCET). Our experiments indicate that with a few preloaded instructions, a PEG instruction cache can achieve the same average-case performance as a regular instruction cache while ensuring performance enhancement even in the worst case.