Designing Low-Cost Hardware Accelerators for CE Devices [Hardware Matters] | IEEE Journals & Magazine | IEEE Xplore

Designing Low-Cost Hardware Accelerators for CE Devices [Hardware Matters]


Abstract:

This article presents the following contributions: 1) a novel mapping of a firefly algorithm (FA) to a multiobjective DSE process, 2) a novel FA-driven DSE (FA-DSE) metho...Show More

Abstract:

This article presents the following contributions: 1) a novel mapping of a firefly algorithm (FA) to a multiobjective DSE process, 2) a novel FA-driven DSE (FA-DSE) methodology during HLS for an application-specific computing system based on an area-execution time tradeoff, 3) a novel boundary outreach algorithm to thwart explosion during the exploration process, 4) a novel sensitivity analysis that provides optimal tuning of FA control parameters (such as the absorption coefficient, control step-size parameter, population size, and so forth) for performing DSE that leads to faster convergence, and 5) the results of a comparison during experiments indicating a reduction factor of up to 2.90 times in the proposed design cost as well as a minimum exploration-time reduction of ~35% compared to other DSE approaches.
Published in: IEEE Consumer Electronics Magazine ( Volume: 6, Issue: 4, October 2017)
Page(s): 140 - 149
Date of Publication: 22 September 2017

ISSN Information:


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