The problem of data reversal in discretized adjoint problems is often solved using checkpointing, trading memory usage with computations and data movement. The authors present a useful model to design and implement an asynchronous two-level checkpointing method with parameterizable values for current and future system configurations. They also evaluate the benefits of new supercomputing hardware through the implementation of an asynchronous algorithm that takes advantage of the fast NVLINK interconnect and Non-Volatile Memory Express (NVMe) memory. They show that the new hardware combined with an asynchronous approach is able to run bigger simulations faster than current generation hardware.