During the digital simulation of the synthetic target to the automotive radar sensor, low latency is an important parameter. This parameter defines the minimum range of the simulated obstacle. Each 6.67 ns of latency increases the minimum target distance per meter. The primary source of latency is the conversion of the radar signal between the analog and digital domains. This paper thoroughly analyzes delay sources in digital radar simulation. On the basis of this analysis, the low latency simulator design is presented. The design was evaluated with an FPGA based target simulator. The experimental results present the overall system latency and comparison with similar solutions.