Abstract:
Matrix multiplication is a widely used algorithm in today's computing. Speeding up the multiplication of huge matrices is imperative for scientists and they are trying to...Show MoreMetadata
Abstract:
Matrix multiplication is a widely used algorithm in today's computing. Speeding up the multiplication of huge matrices is imperative for scientists and they are trying to discover the fastest algorithm. Blocking the matrices reduces the cache misses since both blocks can be stored in L1 cache and thus only the first access of an element will result in cache miss and all other access will be a cache hit. However, choosing the block size is not the only optimization. In this paper we analyze the impact of various block size (M ·K and K ·N) on the performance. The realized experiments use different parameter values for K and predefined values of the parameters M and N, to test algorithm behavior in different cache regions. The results of the experiments show three phenomena. The first phenomenon is that if M is greater than N, then choosing the first block M ·N will achieve a significantly greater speed. The second states that, if the second parameter N is increased for constant M has no significant influence on the performance. Finally, the third phenomenon is that the speed decreases significantly if N is increasing for constant M.
Published in: 2014 37th International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO)
Date of Conference: 26-30 May 2014
Date Added to IEEE Xplore: 24 July 2014
ISBN Information: