Understanding Portability of a High-Level Programming Model on Contemporary Heterogeneous Architectures

Sabne, Amit J.; Sakdhnagool, Putt; Lee, Seyong; Vetter, Jeffrey S.

doi:10.1109/MM.2015.73

Title: Understanding Portability of a High-Level Programming Model on Contemporary Heterogeneous Architectures

Journal Article · Mon Jul 13 00:00:00 EDT 2015 · IEEE Micro

DOI:https://doi.org/10.1109/MM.2015.73· OSTI ID:1265740

Sabne, Amit J. ^[1]; Sakdhnagool, Putt ^[1]; Lee, Seyong ^[2]; Vetter, Jeffrey S. ^[2]

Purdue Univ., West Lafayette, IN (United States)
Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States)

Accelerator-based heterogeneous computing is gaining momentum in the high-performance computing arena. However, the increased complexity of heterogeneous architectures demands more generic, high-level programming models. OpenACC is one such attempt to tackle this problem. Although the abstraction provided by OpenACC offers productivity, it raises questions concerning both functional and performance portability. In this article, the authors propose HeteroIR, a high-level, architecture-independent intermediate representation, to map high-level programming models, such as OpenACC, to heterogeneous architectures. They present a compiler approach that translates OpenACC programs into HeteroIR and accelerator kernels to obtain OpenACC functional portability. They then evaluate the performance portability obtained by OpenACC with their approach on 12 OpenACC programs on Nvidia CUDA, AMD GCN, and Intel Xeon Phi architectures. They study the effects of various compiler optimizations and OpenACC program settings on these architectures to provide insights into the achieved performance portability.

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