The High Energy Physics (HEP) community faces new challenges in designing modern ASICs due to their increasing size and complexity, as well as the use of advanced semiconductor fabrication processes. This has led to a need for a more abstract design methodology that emphasizes the use of modular design techniques and programmable components to speed up the design and verification process. To address these challenges, two complementary approaches are proposed. The first uses a RISC-V based System-on-Chip (SoC) platform employing a radtolerant variant of the AMBA APB bus interconnect, primarily targeting control and monitoring applications. A demonstrator ASIC utilizing this radiation-tolerant SoC platform is presented. The second approach uses Application-Specific Instruction set Processors (ASIPs) to design data path elements for on-detector data processing applications. An integrated workflow is demonstrated using a commercial ASIP Designer EDA tool to define, benchmark, and optimize an ASIP for a specific use case, starting from a general-purpose processor.