Teaching trade-offs in system-level design methodologies | IEEE Conference Publication | IEEE Xplore

Teaching trade-offs in system-level design methodologies


Abstract:

This paper summarizes two graduate-level class projects in EE201A/EE298 (VLSI Architectures and Design Methods) at the University of California, Los Angeles (UCLA). The p...Show More

Abstract:

This paper summarizes two graduate-level class projects in EE201A/EE298 (VLSI Architectures and Design Methods) at the University of California, Los Angeles (UCLA). The purpose of the class is to explore the impact of system-level optimization for various target platforms using EDA.
Date of Conference: 01-02 June 2003
Date Added to IEEE Xplore: 27 September 2004
Print ISBN:0-7695-1973-3
Conference Location: Anaheim, CA, USA

References

References is not available for this document.