Abstract:
The high complexity of the faulty behavior observed in DRAMs is caused primarily by the presence of internal floating nodes in defective DRAMs. This paper describes a new...Show MoreMetadata
Abstract:
The high complexity of the faulty behavior observed in DRAMs is caused primarily by the presence of internal floating nodes in defective DRAMs. This paper describes a new analysis method to apply electrical simulation for investigating the faulty behavior resulting from defects causing two floating nodes within the memory. The paper also presents the results of a simulation study performed on bit line opens to validate the newly proposed method, and suggests a test to detect these bit line opens.
Date of Conference: 29-29 July 2003
Date Added to IEEE Xplore: 18 August 2003
Print ISBN:0-7695-2004-9
Print ISSN: 1087-4852