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Embedded LO synthesis method in harmonic rejection mixers | IEEE Conference Publication | IEEE Xplore

Embedded LO synthesis method in harmonic rejection mixers


Abstract:

A method for effective synthesis of multiple downconversion local oscillator (LO) frequencies within a harmonic rejection mixer (HRM) is presented that employs principles...Show More

Abstract:

A method for effective synthesis of multiple downconversion local oscillator (LO) frequencies within a harmonic rejection mixer (HRM) is presented that employs principles similar to direct digital frequency synthesis. The proposed method reduces the tuning range required of the downconversion oscillator in broadband applications. A passive HRM that implements the proposed LO synthesis method and is robust to both gain and phase mismatch is designed in 130 nm CMOS and covers the 48-860 MHz band with a master clock frequency of 0.77-1.72 GHz. Based on Monte Carlo simulations, while considering device mismatches over a 3σ spread, harmonic rejection better than 63 dB is observed for all selectable LO frequencies.
Date of Conference: 05-08 August 2012
Date Added to IEEE Xplore: 03 September 2012
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Conference Location: Boise, ID, USA

References

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