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Low power block matching using pattern based pixel truncation | IEEE Conference Publication | IEEE Xplore
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Low power block matching using pattern based pixel truncation


Abstract:

A power efficient block matching algorithm is proposed using pattern based pixel truncation scheme. Our observation shows that during block matching, if we represent the ...Show More

Abstract:

A power efficient block matching algorithm is proposed using pattern based pixel truncation scheme. Our observation shows that during block matching, if we represent the block matching process as a one-dimensional signal, we can see clearly that the signal has repeated mountain- and valley-like regions. Utilizing this feature, the proposed low power block matching scheme truncates pixels except the pixels of the valley-like SAD values, which have high chance to be the minimum SAD value. We synthesized the proposed algorithm to measure the switching power dissipation. The results show that the proposed BMA architecture obtains at least 76% power saving with negligible coding performances.
Date of Conference: 02-05 August 2015
Date Added to IEEE Xplore: 01 October 2015
ISBN Information:

ISSN Information:

Conference Location: Fort Collins, CO, USA

References

References is not available for this document.