A 20Gbaud/s PAM-4 65nm CMOS optical receiver using 3D solenoid based bandwidth enhancement | IEEE Conference Publication | IEEE Xplore

A 20Gbaud/s PAM-4 65nm CMOS optical receiver using 3D solenoid based bandwidth enhancement


Abstract:

This paper presents an optical receiver (RX) suitable for amplifying a high-speed PAM-4 signal. To achieve a high gain-bandwidth product at low power consumption, a tripl...Show More

Abstract:

This paper presents an optical receiver (RX) suitable for amplifying a high-speed PAM-4 signal. To achieve a high gain-bandwidth product at low power consumption, a triple inductively peaked regulated cascode (RGC) transimpedance amplifier is used. The inductors are implemented as small 3D solenoids to reduce chip area and optimized for minimum group delay variation. The receiver further includes a Cherry Hooper variable gain amplifier, a continuous time linear equalizer and a 50Ω differential buffer, and achieves a gain of 65 dBΩ at 14 GHz bandwidth. The chip was fabricated using a 65nm CMOS technology and integrated with an 80fF Germanium photodiode by a microbump flip-chip process onto a Silicon Photonic chip. The input referred noise current density is 23.4 pA/VHz. Clear eye diagrams up to 20Gbaud/s (40Gbit/s) have been measured. At this baud rate, the RX's power consumption is 80mW, corresponding to an energy efficiency of 2pJ/bit.
Date of Conference: 06-09 August 2017
Date Added to IEEE Xplore: 02 October 2017
ISBN Information:
Electronic ISSN: 1558-3899
Conference Location: Boston, MA, USA

References

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