With 3D integration of ICs, the thermal hot spots are no longer limited to digital chips. Sensitive analog arrays in high performance data converters are prone to vertical temperature gradients and hotspots of adjacent dies. Though various techniques exist to compensate for systematic errors, none of them address issues related to local hotspot. In this work, we have proposed a technique to compensate hotspot induced errors over the array. An array extension algorithm is also provided to make the technique applicable for higher resolution converters. The performance of proposed array in presence of hotspots is verified on the model of a 16-bit 10-Msps pipelined ADC with 3.5 bit/stage using Matlab. The proposed technique improves the effective resolution of converter by ~1.25 bits (corresponding SNDR improvement is ~8db) with respect to the existing techniques. It also provides additional advantages of gradient compensation, parasitic matched routing and is tolerant to edge effects. Strategies to develop such arrays is discussed in details.