Analog circuits have long been used for solving various mathematical optimization problems due to their lower latency when compared to their digital counterparts. This paper presents a novel continuous-time analog optimization circuit based on a growth transform-based fixed-point algorithm. The circuit uses translinear MOSFET elements to implement the multiplication and normalization functions using only 5 transistors, whereas continuous-time updates and recursion are implemented using current mirrors. The circuit does not require any additional components to enforce optimization constraints and naturally converges to a steady-state solution corresponding to a local minimum of an objective function. We show that the proposed circuit is generic enough to encompass a multitude of objective functions simply by changing the external circuitry, and the power dissipation of circuit can be adjusted according to the desired latency. For this paper, we present simulation results for specific forms of quadratic and linear cost functions with tunable coefficients, subject to a normalization constraint, and the results show excellent match to floating-point software simulation results.