This paper presents a 32 Gb/s transmitter (TX) with non-return-to-zero (NRZ) modulation scheme. Fabricated in the 28nm CMOS technology, the TX incorporates a quarter-rate architecture with a three-tap feed-forward equalizer (FFE) under the consideration of timing requirement and power consumption. Key features of the TX include a low-power data-serializing path, a pulsed pass-gate 4:1 multiplexer (MUX), a pre-driver adopted sub-UI de-emphasis, a current-mode logic (CML) output driver combined common-mode feedback (CMFB), an output network using a T-coil inductor to eliminate the parasitic capacitance of ESD and pad for bandwidth expansion. The critical clock path contains sub-50fs resolution duty cycle detection/correction (DCD/DCC) and quadrature error detection/correction (QED/QEC) circuits. The TX operating at 32Gb/s in NRZ modulation, including the clock path, consumes 98 mW under 1V supply, achieving a 3.06 pJ/b energy efficiency with 0.8 Vpp output swing. The TX front end core circuit occupies an area of 0.078 mm².