Abstract:
We present the design of a low-power 3rd order sigma-delta (ΣΔ) modulator targeted for sensor applications. The circuit is implemented in the 22 nm Fully Depleted Silicon...Show MoreMetadata
Abstract:
We present the design of a low-power 3rd order sigma-delta (ΣΔ) modulator targeted for sensor applications. The circuit is implemented in the 22 nm Fully Depleted Silicon on Insulator (FDSOI) CMOS process technology from GlobalFoundries. The modulator features a single-loop feedforward architecture. Low-voltage operation of the fully-differential switched-capacitor based modulator is achieved with enhanced bootstrapped switches for highly linear sampling., and operational transconductance amplifiers (OTAs) operating in weak inversion. The on-chip area of the modulator is 0.193 mm2. The measurement results show that operating over a signal bandwidth of 500 Hz at a nominal supply voltage of 0.8 V and a sampling rate of 512 kHz., the modulator achieves a peak signal-to-noise-and-distortion ratio (SNDR) of 89 dB and a dynamic range of 94 dB. The total average power consumption of the designed modulator, including that of the auxiliary circuits, is 170 μW.
Date of Conference: 23-26 June 2019
Date Added to IEEE Xplore: 20 January 2020
ISBN Information: