This paper proposes the use of approximate adder compressors for a low-power 8-point Modified Rounded Discrete Cosine Transform (MRDCT10) implementation. The algebraic approximation of the MRDCT was previously introduced in the literature, whose resultant matrix is only composed of 0, 1 and -1 values. Therefore, the MRDCT can be efficiently implemented using only adders and subtractors. We present an environment for the synthesis of the MRDCT in Cadence Encounter RTL Compiler tool. The synthesis reports are based on a set of real images as input vectors to obtain valid power results. Our results show that the use of approximate adder/subtractor compressors in hardwired state-of-the-art 8-point approximate MRDCT₁₀ achieves savings ranging from 26% to 52.54% when compared with the macro function (+) from the tool.