A 16 Gbps, 0.126 pJ/bit single-ended, TIA driver for simultaneous bidirectional die-to-die links was designed in TSMC 65nm, 1.2V CMOS technology. The TIA driver uses pMOS and nMOS active inductors to reduce peaking in the output of the TIA driver, thus reducing signal reflections at high frequency and improving the eye margin of the link. Post-layout simulation results at 16 Gbps over a 10-mm die-to-die link demonstrate the ability of the TIA driver to reduce signal reflections from nominal at 8 GHz by 69.76%, increasing eye height and width by 14.29% and 28.57%, respectively.