Low-Complexity Unidimensional CNN based Brain Speller for Embedded Platforms | IEEE Conference Publication | IEEE Xplore

Low-Complexity Unidimensional CNN based Brain Speller for Embedded Platforms


Abstract:

A brain speller is a particular kind of Brain-Computer Interface (BCI) that allows composing words or phrases by spelling each character via simple eye-gaze movements. Re...Show More

Abstract:

A brain speller is a particular kind of Brain-Computer Interface (BCI) that allows composing words or phrases by spelling each character via simple eye-gaze movements. Recently, these BCIs got the scientific community's attention due to the introduction of new classification architectures based on neural networks (NNs). Nevertheless, trying to overcome the current accuracy limits, the NN-based architectures increased their complexity, thereby preventing their use in embeddable and portable BCIs. To bridge this gap, in this paper, we propose a novel low-complexity brain speller with two main constraints: (i) suitability for low resources embedded platforms (to favor portable BCIs) and (ii) maximize character accuracy. The proposed brain speller bases its work on electroencephalographic signals (EEG) and, in particular, on a specific event-related potential, known as P300. Thus, we developed a novel convolutional neural network, the Embeddable- Convolutional NN (E-CNN), that exploits two 1D convolutional layers and an intermediate batch normalization step to protect against covariate shift of data and two dropout sections to lighten up overfitting phenomena. The network has been optimized, under the complexity and memory usage aspects, by embedding a first offline channels selection stage, which reduces the number of channels needed for the proper functioning and a dedicated routine to keep the NN parameters number low. For the sake of comparison, the BCI performance has been tested on a publicly available dataset and validated on an STM32L4 microcontroller target. Experimental results, compared here with the state of the art, showed an improvement in recall parameter (+3%), with a slight reduction of binary accuracy and F1-score, but a related large reduction of memory usage (on average, −85%), with only 12.31% of the STM32L4 available RAM, demonstrating its full suitability for embedded platform implementation.
Date of Conference: 26-27 October 2021
Date Added to IEEE Xplore: 16 November 2021
ISBN Information:
Conference Location: Oslo, Norway

Contact IEEE to Subscribe

References

References is not available for this document.