Non-volatile memory (NVM) enables intermittent systems without batteries because of the persistence of NVM. However, the persistence presents a new challenge to memory consistency threatening to corrupt application data across a power failure. Prior work proposes various software-based techniques built upon compiler instrumentation to achieve memory consistency. However, those techniques are not only limited by the complexity, conservatism, and soundness of static program analyses resulting in an excessive amount of checkpoints, but also lack the guarantee of forward progress. This paper presents TCCP, a Transparent Consistency-aware CheckPointing hardware scheme that automatically checkpoints the system states, thus requiring neither recompilation nor user intervention. TCCP does not immediately perform committed stores to non-volatile memory as if they are speculative assuming an impending power failure. Across a failure, such speculation allows TCCP to rollback to an execution point with consistent program states by simply discarding the speculative stores. To achieve this, TCCP only requires very few modifications to conventional processor design practices, as it leverages the existing store buffer. To provide forward progress guarantee, TCCP also incorporates a simple counter-based logic. On average, TCCP incurs only 0.7% runtime overhead and reduces the number of checkpoints by 3.1X compared to the state-of-the-art software-based scheme.