On how to efficiently accelerate brain network analysis on FPGA-based computing system | IEEE Conference Publication | IEEE Xplore

On how to efficiently accelerate brain network analysis on FPGA-based computing system


Abstract:

The ability to map neural networks is of fundamental importance for the understanding of the plasticity of neural connections, their behavior and organization, as well as...Show More

Abstract:

The ability to map neural networks is of fundamental importance for the understanding of the plasticity of neural connections, their behavior and organization, as well as the clinical implications related to neurological conditions. Being able to quickly and accurately model and map neural interconnections through Brain Networks (BNs) is critical for the study and modeling of neurodegenerative diseases such as Alzheimer's disease and Essential Tremor. However, both the construction and the analysis of BNs require massive amounts of computing resources. Currently, it is conceivable to analyze only few hundred of neural nodes in reasonable time. In this paper, we focus on the development of an hardware accelerator for the analysis of autofluorescence of mitochondria, the clinical technique used to derive BNs. Our results are state of the art for the construction and analysis of BNs, providing the community, both academic and industrial, a fundamental tool to enable further development in this field.
Date of Conference: 07-09 December 2015
Date Added to IEEE Xplore: 01 February 2016
ISBN Information:
Conference Location: Riviera Maya, Mexico

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