Shorter design cycles in FPGA-based Programmable System-on-Chips (PSoCs) development require a higher level of design automation, which has led to a wide acceptance of model driven engineering. However, design and implementation of applications on such heterogeneous PSoC platforms still demand a comprehensive expertise in hardware/software co-design. Therefore, to keep up with this trend, an automated systematic design flow that couples model-based design and simulation with High-Level Synthesis (HLS) for hybrid hardware and software implementations is necessary. In order to address this issue, the work at hand makes use of the modeling and simulation environment MATLAB/Simulink, a de facto standard in model-based development. Additionally, we present a novel design flow which automatically synthesizes individual hardware/software solutions for Xilinx Zynq PSoCs based on a manual partitioning of blocks. Thereby, the proposed methodology enables control and system engineers to automatically explore different hardware and software implementation variants from a behavioral model. As a case study, we present a JPEG decoder application and investigate design objectives like resource costs and throughput to show the practicability of our approach.