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Development of a dual-stage virtual metrology architecture for TFT-LCD manufacturing | IEEE Conference Publication | IEEE Xplore

Development of a dual-stage virtual metrology architecture for TFT-LCD manufacturing


Abstract:

Processing quality of thin film transistor-liquid crystal display (TFT-LCD) manufacturing is a key factor for production yield. In general, the processing quality of prod...Show More

Abstract:

Processing quality of thin film transistor-liquid crystal display (TFT-LCD) manufacturing is a key factor for production yield. In general, the processing quality of production equipment is not only related to its own manufacturing process but also affected by the process result of the previous equipment. Current proposed virtual metrology (VM) architectures are all applied to conjecture processing quality of a single stage. These single-stage VM architectures lack the ability of detecting the processing drift occur between different stages. This paper proposes a novel dual-stage VM architecture for quality conjecturing that involves two pieces of equipment. The architecture consists of two stages. In Stage I, the fore-equipment VM model is established as usual and then the rear-equipment VM model that depends on stage-I VM output is built in Stage II. An example of the proposed dual-stage VM architecture applied to two sets of TFT-LCD chemical vapor deposition (CVD) equipment is presented. Experimental results demonstrate that this dual-stage VM architecture is promising for TFT-LCD manufacturing.
Date of Conference: 19-23 May 2008
Date Added to IEEE Xplore: 13 June 2008
ISBN Information:
Print ISSN: 1050-4729
Conference Location: Pasadena, CA, USA

References

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