Abstract:
In this paper a CMOS reading circuit for memristor-based RRAM (Resistive Random Access Memory) cell is described. Simulations for one cell, 4 by 4 nMOS-accessed-array and...Show MoreMetadata
Abstract:
In this paper a CMOS reading circuit for memristor-based RRAM (Resistive Random Access Memory) cell is described. Simulations for one cell, 4 by 4 nMOS-accessed-array and extension to N by N nMOS-accessed-array are presented. The proposed circuit is based on CMOS inverters, which result in a simple low area architecture and in a non-destructive operation. Resistive switching memristor is used as reading reference. Simulations were performed in 0.5 μm and 180 nm CMOS technology and using memristor model available in bibliography.
Published in: 2018 IEEE 4th International Forum on Research and Technology for Society and Industry (RTSI)
Date of Conference: 10-13 September 2018
Date Added to IEEE Xplore: 29 November 2018
ISBN Information: