Compiler technology plays an important role in embedded applications, performance and power efficiency. Compilers provide software engineers with a wide variety of optimization settings (i.e., flags), which can be used to either configure debugging and warning messages or to achieve code optimization. While the use of optimization flags can substantially improve the performance of embedded application, their impact on soft error resiliency remains unclear. This paper investigates the impact of compiler optimization flags (i.e., -O1, -O2, -O3, and -Os) on soft error reliability of a MIPS processor running 24 benchmarks with up to 2.2 million instructions. The results show that the -Os level increased the soft error resilience to 75% of the application set when compared to the -O0 level. Moreover, -Os level provided enhancements up to 3.1x.