Technology shrinking has allowed major improvements through the last decades, from the increased performance and design complexity while maintaining circuit area to more reliable and power-efficient Integrated Circuits (ICs). However, with smaller transistors, especially in harsh environments, modern chips are becoming more susceptible to Single-Event-Multiple-Transients (SEMTs) in the combinational logic due to radiation effects. The combination of asynchronous design with Radiation Hardened by Design (RHBD) has shown great potential to increase robustness to soft errors arising from Single-Event-Transients (SETs), but detailed SEMT analyses are missing and of great concern for the future that lies ahead of modern VLSI systems. In this paper, the asynchronous Radiation Hardened (RH) Click controller's robustness to SEMT is accessed, and a post-placement approach is proposed to group and space critical cells apart. Fault simulation experiments demonstrate that the proposed spacing strategy is effective in mitigating SEMTs.