Hybrid Networks-on-Chip broaden paths for constrained optimization. The design space exploration (DSE) approach searches optimized network configurations to comply with those constraints. However, when DSE relies solely on a simulation approach, it may take a considerable time to obtain the desired results, thus shortening the number of possible scenarios to be tested. This paper proposes using Machine Learning (ML) to optimize the DSE step, making the process faster than using simulation-based approaches. Experimental results demonstrate that the proposed model was able to predict the latency values with an error rate of 2% and predict the delivered packets with an error rate of 1%.