Abstract:
In today's mobile computers, such as tablets and smart phones, power, performance and chip area are the major constraints to the development of cost efficient high tech p...Show MoreMetadata
Abstract:
In today's mobile computers, such as tablets and smart phones, power, performance and chip area are the major constraints to the development of cost efficient high tech products. One solution is the usage of application-specific instruction-set processors (ASIP), which are optimized for the execution of special tasks and thus enable a more efficient implementation. As an extension to this approach the LISPARC processor is developed. For more flexibility, the LISPARC model enables dynamic reconfiguration at run-time in order to adapt to different ASIPs. The processor model of LISPARC is described using an architecture description language called Language for Instruction-Set Architectures (LISA).
Date of Conference: 20-22 June 2012
Date Added to IEEE Xplore: 24 November 2012
ISBN Information: