Image processing can be defined as analysis of the images consists of the several steps. The edge detection process that is one of these steps can be performed using a variety of operators. Sobel edge detection operator, is a basic operator, is preferred to use with high noisy images because its corruption is insensible on images. The proposed work presents an edge detection algorithm using Sobel operator based on FPGA architecture. Proposed system is designed using IEEE 754-1985 floating-point standard and VHDL hardware description language. Design is synthesized for Xilinx Virtex-6 FPGA chip with 160 MHz operating frequency. The performance is decreed according chip statistics.