Implementation of a steady state visual evoked potantial based brain computer interface | IEEE Conference Publication | IEEE Xplore

Implementation of a steady state visual evoked potantial based brain computer interface


Abstract:

In this study, steady-state visual evoked potential based brain computer interface design and implementation was being carried out. A portable and affordable EEG device w...Show More

Abstract:

In this study, steady-state visual evoked potential based brain computer interface design and implementation was being carried out. A portable and affordable EEG device was used to obtain brain signals. Computer monitor were preferred as visual stimuli source. In offline and online experiment, for detection of target visual stimulus selected by user, the amplitude of the EEG signal components, which correspond visual stimulus frequencies, and correlation coefficient features were tested. In the classification stage the performance of different classification methods were compared and presented along tables.
Date of Conference: 16-19 May 2016
Date Added to IEEE Xplore: 23 June 2016
ISBN Information:
Conference Location: Zonguldak, Turkey

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