Abstract:
This paper proposes a new memory-based FFT processor. Only an N-bit single-port memories are required for implementing an N-point FFT processor. This reduces the area, po...Show MoreMetadata
Abstract:
This paper proposes a new memory-based FFT processor. Only an N-bit single-port memories are required for implementing an N-point FFT processor. This reduces the area, power, and test cost of the proposed memory-based FFT processor. Moreover, a time/space-embedded signal flow graph is proposed to verify the functionality of our proposed memory-based FFT processor. Experimental results show that area cost of the memories in the proposed FFT processor is much lower than those described in the existing works.
Published in: 2007 IEEE International SOC Conference
Date of Conference: 26-29 September 2007
Date Added to IEEE Xplore: 20 June 2008
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