Abstract:
A zero-overhead dynamic optically reconfigurable gate array (ZO-DORGA), based on a concept using junction capacitance of photodiodes and load capacitance of gates constru...Show MoreMetadata
Abstract:
A zero-overhead dynamic optically reconfigurable gate array (ZO-DORGA), based on a concept using junction capacitance of photodiodes and load capacitance of gates constructing a gate array as configuration memory, has been proposed to realize both a high gate-count and zero-overhead rapid reconfiguration. This paper presents the world’s largest 11,424 gate-count zero-overhead VLSI chip fabricated on a 96.04 mm2 chip using 0.35 μm-3 metal CMOS process technology. The optical reconfiguration circuit, the gate array structure, the CAD layout, and the performance of ZO-DORGA-VLSI are described, with reference to experimental results related to the reconfiguration period and retention time.
Published in: 2007 IEEE International SOC Conference
Date of Conference: 26-29 September 2007
Date Added to IEEE Xplore: 20 June 2008
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