Design space exploration for application specific FPGAS in system-on-a-chip designs | IEEE Conference Publication | IEEE Xplore

Design space exploration for application specific FPGAS in system-on-a-chip designs


Abstract:

The inclusion of field programmable gate arrays (FPGAs) within a system-on-a-chip (SOC) design offers programmability, flexibility, and reconfigurability not possible wit...Show More

Abstract:

The inclusion of field programmable gate arrays (FPGAs) within a system-on-a-chip (SOC) design offers programmability, flexibility, and reconfigurability not possible with application specific integrated circuits (ASIC) or full-custom implementations. However, these benefits come at the expense of significant area, performance, and power consumption overheads compared to ASIC or full-custom circuits. As a typical SOC design will require fabrication of the final integrated circuit, rather than rely on a generic FPGA architecture, an FPGA integrated within an SOC design can be optimized for the specific intended application. In this paper, we present an initial design space exploration framework for generating an application specific FPGA (ASFPGA) by tailoring several FPGA architectural features for a specific hardware circuit to improve the area, delay, or energy consumption compared to traditional FPGA designs and reduce the overheads of utilizing an FPGA compared to ASIC and full custom implementations.
Date of Conference: 17-20 September 2008
Date Added to IEEE Xplore: 10 October 2008
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Conference Location: Newport Beach, CA, USA

References

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