Abstract:
Achieving energy-efficiency in nanoscale CMOS process technologies is made challenging due to the presence of process, temperature and voltage variations. In this paper, ...Show MoreMetadata
Abstract:
Achieving energy-efficiency in nanoscale CMOS process technologies is made challenging due to the presence of process, temperature and voltage variations. In this paper, we present soft N-modular redundancy (soft NMR) that consciously exploits statistics of errors due to these nanoscale artifacts in order to design robust and energy-efficient systems. In contrast to conventional NMR, soft NMR employs estimation and detection techniques in the voter. We compare NMR and soft NMR in the design of an energy-efficient and robust discrete cosine transform (DCT) image coder. Simulations in a commercial 45 nm, 1.2 V, CMOS process show that soft triple-MR (TMR) provides 10times improvement in robustness and 13% power savings over TMR at a peak signal-to-noise ratio (PSNR) of 20 dB. In addition, soft dual-MR (DMR) provides 2times improvement in robustness and 35% power savings over TMR at a PSNR of 20 dB.
Published in: 2009 International Symposium on System-on-Chip
Date of Conference: 05-07 October 2009
Date Added to IEEE Xplore: 13 November 2009
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