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Functional verifications for SoC software/hardware co-design: From virtual platform to physical platform | IEEE Conference Publication | IEEE Xplore
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Functional verifications for SoC software/hardware co-design: From virtual platform to physical platform


Abstract:

This paper applies heterogeneous simulation to achieve system and functional level co-verification throughout SoC design flow. It reduces high verification complexity res...Show More

Abstract:

This paper applies heterogeneous simulation to achieve system and functional level co-verification throughout SoC design flow. It reduces high verification complexity resulted from covering software and hardware works and involving various tools. Stubs for data transport and a Verification Router for heterogeneous simulation management are proposed. A functional module is transformed from a highly abstract model to its target design progressively through a series of intermediate models. Those models can be validated as a portion of a complete SoC system model. The proposed heterogeneous verification is demonstrated with a jpeg encoder.
Date of Conference: 26-28 September 2011
Date Added to IEEE Xplore: 21 November 2011
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ISSN Information:

Conference Location: Taipei, Taiwan

References

References is not available for this document.