Abstract:
Summary form only given. As technology scaling down becomes more and more difficult, the traditional von Neumann computer architecture cannot satisfy people's unlimited d...Show MoreMetadata
Abstract:
Summary form only given. As technology scaling down becomes more and more difficult, the traditional von Neumann computer architecture cannot satisfy people's unlimited demand on high performance computation. Consequently, the neuromorphic hardware systems providing the capabilities of biological perception and information processing at compact and energy-efficient platform have drawn people's attention. Realizing neural network algorithms requires a large volume of memory and being adaptive to environment, which results in high design complexity and hardware cost. Not mentioning its promising characteristics, such as non-volatility, low-power consumption, high integration density, and excellent scalability, the recently rediscovered memristor device also has the unique property to record the historical profile of the excitations on the device, making it an ideal candidate to realize the synapse behavior in electronic neural networks. In this tutorial, I will introduce the utilizations of memristors in dynamic reconfigurable systems and in hardware realization of neuromorphic algorithms. The memristor-based neuromorphic system can offer extremely high computation parallelism, high resilience to process variations and transient run-time errors, and high power efficiency with ultra-low hardware cost and small footprint. Moreover, our design is fully compatible to the present-day CMOS fabrication process, demonstrating an excellent scalability.
Published in: 2012 IEEE International SOC Conference
Date of Conference: 12-14 September 2012
Date Added to IEEE Xplore: 31 December 2012
ISBN Information: