Loading [a11y]/accessibility-menu.js
A multi-level collaboration low-power design based on embedded system | IEEE Conference Publication | IEEE Xplore

A multi-level collaboration low-power design based on embedded system


Abstract:

This essay provides a multi-level collaboration low-power design based on embedded processor, builds SoC (System-on-Chip) and designs a low-power SoC by register level, s...Show More

Abstract:

This essay provides a multi-level collaboration low-power design based on embedded processor, builds SoC (System-on-Chip) and designs a low-power SoC by register level, system level and gate level. The designed clock gating module, power management module and system program coordination can be used to realize the sleep and wake up functions on SoC. In order to realize a multi-level collaboration low-power designing, gating clock circuit can be used in circuit designing.
Date of Conference: 08-11 September 2015
Date Added to IEEE Xplore: 15 February 2016
ISBN Information:
Electronic ISSN: 2164-1706
Conference Location: Beijing, China

Contact IEEE to Subscribe

References

References is not available for this document.