Abstract:
In this paper, we propose a second-generation hardware solution which boasts more versatility, efficiency and scalability compared to our previous design. This is achieve...Show MoreMetadata
Abstract:
In this paper, we propose a second-generation hardware solution which boasts more versatility, efficiency and scalability compared to our previous design. This is achieved through the design of a highly versatile PMM accelerator which supports polynomial matrices of any size, as a component of the embedded system developed within the Xilinx Zynq-7000 AP SoC. Experimental results demonstrate the efficiency and effectiveness of our novel SoC-based PMM accelerator in the context of a generic problem, where a maximum speed-up of ≈ 67× is accomplished, without compromising the accuracy.
Date of Conference: 03-06 September 2019
Date Added to IEEE Xplore: 07 May 2020
ISBN Information: