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High-performance architecture of H.264 integer-pixel motion estimation IP for real-time 1080HD video CODEC | IEEE Conference Publication | IEEE Xplore

High-performance architecture of H.264 integer-pixel motion estimation IP for real-time 1080HD video CODEC


Abstract:

We propose a new H.264 integer-pixel motion estimation algorithm and circuit architecture to improve the processing speed. The proposed circuit supports 7 kinds of variab...Show More

Abstract:

We propose a new H.264 integer-pixel motion estimation algorithm and circuit architecture to improve the processing speed. The proposed circuit supports 7 kinds of variable block sizes and generates 41 motion vectors. The implemented IP based on the proposed algorithm and architecture processes 60 image frames per second for 1080HD video at the operating frequency of 45.5 MHz.
Date of Conference: 09-11 September 2009
Date Added to IEEE Xplore: 22 January 2010
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ISSN Information:

Conference Location: Belfast, UK

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