Abstract:
In the last two decades, multiprocessing technology has become a more important feature of complex digital systems, such as railway interlocking. Such systems can be impl...Show MoreMetadata
Abstract:
In the last two decades, multiprocessing technology has become a more important feature of complex digital systems, such as railway interlocking. Such systems can be implemented as distributed systems, especially the spur plan based interlocking systems, in case of which the lineside railway equipments are controlled by logically separate hardware units, connected with dedicated trace cables. Due to the growing complexity of the signalling system logic and the new GSM-R technology based ETCS systems often cause conflicting requirements. In fulfilling the requirements, the designer cannot avoid to use different generic or special purpose processing units, like CPU, CPLD, FPGA or ASSP-s. These kind of system architectures called heterogeneous multiprocessing architectures (HMA). There is no proven practice for designing a HMA based heterogeneous multiprocessor system (HMS), and this is often the cause of many intuitive design steps. During developing a HMS, the designer may utilize various high level logic synthesis (HLS) tools. Among other things, dataflow-graphs can be used as a formal method of task description and graph decomposition algorithms can be used for generating proper segments of the task. This paper presents how to use the spectral properties of the data flow graphs for decomposition in the design of HMS. Such systematic design methodologies may also benefit later maintenance and reliability of the designed system.
Date of Conference: 02-04 June 2020
Date Added to IEEE Xplore: 01 July 2020
ISBN Information: